Welcome the SJSU IC design group’s Homepage. The mission of our laboratory is to provide a state of the art environment for students to design, have fabricated through MOSIS, and test analog and digital ICs.
Synopsys has
generously donated ALL their software tools and Linux Machines, and we are part
of the
(Note you must be registered, and have your fees paid to generate an account. Also this account site only works inside the engineering building (not wireless).
Installed CAD tools:
- Synopsys CAD tools
- Sentaurus
- HSPICE
- VCSMX
- Synthesis
- Core
- Cadence Tools
- The IC51 Bundle from Cadence
- The IUS5531, SOC42 Bundle from Cadence
Computers:
- 25 Dell Linux Machines (Thanks Intel!) in Room 289
- 25 HP Linux Machines (Thanks Synopsys!) in Room 291
Proposal Format for MSEE or BSEE
Projects
Template for Project Presentations
A IC Design Example of a PPT
Presentation
How to make nice looking plots for
your power point presentation from Cadence simulation data
Paper submitted to JSSC
based on Asynchronous Adders
Documentation:
- Getting Started with UNIX and CDE
- TCAD Training with Synopsys Sentaurus Diode Processing.
- TCAD Training with Synopsys Sentaurus Sdevice, Si Bar
- Bottom Up Design Cadence Tutorial
- FAQ 1 on Cadence Tools
- Module 2: Using NC-verilog to verify your logic in complex AOI circuits.
- Old 1.6 micron Cadence Tutorial.
- Tutorial on Installing the NCSU KIT
- Modified form of the NCSU KIT
- How to use the AMI16 PADFRAME
- Gate Array
- How to use a Standard cell (ASIC) Design approach (vhdl or verilog to physical)
- ICS Metrics testing manual for transistors
Case Studies in IC design:
- 3.2GHz VCO (For real)
- Super MOS
- 5 bit A2D with Test Board
- SRAM Chip
- On Chip Heat Control Circuit
- 6 Bit A2D
- Improved PLL
- 6bit Multiplier
- 4 Bit ALU
Important Links:
· Links to most university cadence websites
· http://vlsi1.engr.utk.edu/ece/bouldin_courses
· class18
· http://www.ee.washington.edu/class/cadta/hspice/
· Main site for IIT and James Stine: http://www.ece.iit.edu/~cad/cadence/
· Specific tutorial to get around doing a test bench http://www.ece.iit.edu/~cad/cadence/spectre2.html
· This is a SpecterS tutorial using the 741 as an example: http://www.d.umn.edu/~bshaer/cadence/ece3235/spectre.html
· This tutorial is on Affirma Analog:
http://www.egr.msu.edu/classes/ece813/mason/tutorial-c.htm
- This one is a basic tutorial on the complete digital design F-B design flow: http://vlsi.wpi.edu/cds/
- Here is another (good) full tutorial:
http://www.ee.vt.edu/~ha/cadtools/cadence/gate.html
- This one is Edgar Sanchez’s website. It has nothing to do with cadence but it’s the best analog design website there is out there. Check it out when you have some time:
http://ee.tamu.edu/HOME00/00_PEOPLE/bios/bsanchez.html