David W. Parent

One Washington Square

EE Department

San Jose State University

San Jose CA, 95192-0084

 

Fall Spring Office Hours:

ENGR 355

 

 

Please make an online appointment for office hours here.

 

Voice 408-924-3963 (Email is better.)

FAX 408-924-3925

E-mail: david.parent@sjsu.edu

Web: www.engr.sjsu.edu/dparent

 

 

Class web pages

EE-128

Solid State Physics

EE/MatE-129

Intro to IC processing

 

New Lab!

EE/MatE-167

Design Fabrication and test of CMOS circuits

EE-166 Design of CMOS Digital Integrated Circuits

EE-224

High Speed CMOS Circuits

EE-221

Principles of Device Physics

 

Solar Cells

EE-98 Introduction to Circuit Analysis

EE198 Senior Design

EE 225A

Analog IC Transistor Process Design

Chemical and Materials Engineering & Electrical Engineering
EE/MatE 165 Photovoltaic Fabrication

EE 122

Want to be an EE? (PDF)

 

Academic Planning Form

 

Critical Path for Electrical Engineers

 

Sample 4 year plan

 

Probation and Disqualification

ENGR 297D Solar Cell Device Physics

 

 

IC Group Design Resources and Cadence

Tutorials

    Cadence Help

    Cadence Tutorials

    Friday Lab Meetings

 

Athena/Atlas Resources

   Help for EE167, EE221, EE222 students

   doing process simulation

 

 Need A UNIX Account (Cadence/Synopsys)?  

You need to be a registered student and have paid your

fees for the semester. It takes 24 hours after registering and

paying your fees for your account to be active.  You need

to be behind the College’s fire wall for this to work.  Use the

pc’s in room 387.

 

Cadence University Member Website

 

 

 

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