|
Chang Y. Choo, Ph.D.
Professor of Electrical
Engineering
Director of DSP/FPGA Laboratory
College of Engineering
San Jose State
University
Phone: (408) 924-3980
Fax: (408) 924-3925
E-mail: cychoo@email.sjsu.edu
Office Hours
during Spring 2010:
Mon, 12pm-1pm, 3pm-4pm
Tue,
3:30pm-5:30pm (incl. Wkly MS/BS Proj. Mtg.)
Wed,
3pm-4pm
Other
time by appointment only
|
