Exploring Materials Engineering



Semiconductor Materials

Whereas polymers are highly visible engineering materials with a major impact on contemporary society, semiconductors are relatively invisible but have a comparable social impact. Technology has clearly revolutionized society, but solid-state electronics is revolutionizing technology itself. A relatively small group of elements and compounds has an important electrical property, semi-conduction , in which they are neither good electrical conductors nor good electrical insulators. Instead, their ability to conduct electricity is intermediate. These materials are called semiconductors, and in general, they do not fit into any of the four structural materials categories based on atomic bonding. Metals are inherently good electrical conductors. Ceramics and polymers (non-metals) are generally poor conductors but good insulators. The three semiconducting elements (Si, Ge, and Sn) from column IVA of the periodic table serve as a kind of boundary between metallic and nonmetallic elements. Silicon (Si) and germanium (Ge), widely used elemental semiconductors, are excellent examples of this class of materials. [Another important semiconductor material is GaAs, a compound of the group IIIA element Ga; and the group V element, As.]

Taken from Introduction to Materials Science for Engineers, James F. Shackelford, Pearson, Higher Education.



One area of materials engineering is called "process engineering". It is perhaps best illustrated by the production of integrated circuit devices. An excellent montage representing IC processing is illustrated in the following IBM gif. Behind the Process Engineer, one see's a blow-up of the three-dimensional array of metallization lines that interconnect the various device regions on an integrated circuit. The gray substrate under the pink, white, yellow and green metallization pattern, is the silicon wafer, which is a semiconductor material. These interconnects are typically less than a micro-meter in thickness! The reference source URL is IBM chip technology





The metallization lines in the above figure connect regions of the semiconductor that have been specifically "doped" to change electrical performance. Doping involves substituting other elements (like phosphorous and boron, for example) for individual Si atoms in the Si-wafer. When differently doped regions of the semiconductor are properly positioned and electrically connected, transistors (for example) can be made.

The image to the left shows the first transistor, discovered by Bardeen, Brattain and Shockley at Bell Labs. The triangular hunk is a piece of Ge crystal. In 1947, when they switched to using tremendously pure materials, it dawned on Bardeen, Brattain and Shockley that they could build the circuit in the picture. It was an amplifier! For more about this important discovery, visit the source URL at the PBS website. For more about transistor regions in today's IC's, link to the following web page.

The complex, interconnected, metal lines on today's integrated circuits begin as a metallic thin-film layer, deposited on the top of a silicon wafer. Photolithography [use a search engine to find out what this is all about] is used to establish the architecture of the lines: subsequent etching steps define them. To learn more about the deposition of thin-film metals and to see some of the equipment used, go to AltProcess.htm . For an Introduction to the Principles of Electronic Devices, visit University of Colorado Boulder web pages. To see detail of IC architecture, visit the Materials Characterization web pages of the WofMatE. The pbs transistor web pages offer further detail of typical IC device concepts and architecture.

The products of the process engineer in the microelectronics industry are represented in this montage (left), also from IBM. A typical IC (full die shot of the HP PA-8000 microprocessor using oblique illumination with blue and red gels) is shown on the right. For more photomicrographs of IC dies, visit these Florida State University web pages.




One step in the production of semiconductor devices involves the growth of a large (10 or more inches in diameter!) single crystal of silicon by the Czochralski process. In this process, a solid seed crystal is rotated and slowly extracted from a pool of molten Si. This is shown above. The various steps in the production of semiconductor devices are clearly illustrated on the web pages of Fullman-Kinetics, the source of the Czochralski image-sequence, above. This is only an example of the Fullman-Kinetics series "The Semiconductor Manufacturing Process". [The Fullman-Kinetics web pages appear to no longer be available on the Internet, and this is a shame. They were excellent!] However, please visit the chip fabrication processing video at this AMD website. You may also wish to visit this San Jose State University link which outlines the basic step of photolithography, an integral part of integrated circuit production.

In another IC processing step, after wafers of silicon are sliced from the single crystal and then polished, they are thermal-annealed in an oven. Below (left) we see Si wafers entering an oven for an annealing treatment. This is taken from the Intel web pages.





In a vacuum chamber, fine, intricate patterns are etched into silicon wafers with an ion discharge (above, right). This is another critical step in the production of integrated circuits. The violet glow is emitted by the ion plasma. The plasma etching process makes possible the small geometries need for very large scale integration in silicon chips. This plasma-image originated with Lucent-Technology web pages, no longer in existence. Visit the following Bell Labs web pages for more information on plasma deposition. The vacuum cvd-chamber schematic is from the following Russian Zelenograd web pages.

A really neat overview of the layer-by-layer creation of a solid state mircro-electronic device is included on the FSU Molecular Expressions web pages at the following URL . You are highly encouraged to visit and explore the Molecular Expressions web site!

The above images illustrate methods applicable to the fabrication of integrated circuits (IC's) [also termed "chips"] used in the production of microelectronic devices. The process engineer plays a key role in the production of IC's. But the process engineer too is involved in the packaging of these microelectronic devices; and in the assembly of packaged device on to the printed circuit board (PCB). The whole sequence is quite elaborate and a comprehensive treatment is well outside the scope of these web pages. However, I would like to introduce you to one facet of IC packaging and that is the bonding of the IC chip to a suitable substrate. For this example, consider "flip chip" technology. The respective images presented below have been extracted from the flip chip, MEMS web pages of the MEMS Technology Application Center which no longer exists. A brief overview of advanced IC packaging is presented in the following , now Samtec Microelectronics link.

'Flip chip' is a general term that describes a method of attaching an integrated circuit (ie, IC) to a substrate. The substrate can be another chip, a PC board, a special carrier or a multichip module. More specifically, flip chip is a technology in which one chip is placed face down (flip chipped) on to the substrate and attached through solder bumps that provide both mechanical and electrical connection. Flip chip provides a much higher interconnection density than traditional methods (i.e. wire bonding) because the interconnections are distributed across the entire chip surface rather than being restricted to the periphery of the chip.

This technology can be used to attach a MEMS chip to a die, as in the example introduced above. For information about MEMS and MEMS applications, visit the following webpages, the MEMS image gallery.

The MEMS chip shown in the figure must be aligned so that the appropriate pads on the die and chip are in contact. Then the solder is heated to the reflow-temperature (a temperature where the solder "bumps" reflow and solidify upon subsequent cooling), thus providing both mechanical and electrical contact. Shown is a joined pair, chip to die, after solder reflow. A cross-section through a flip chip illustrating a typical solder bump appears on the left; and an actual array of re-flowed solder bumps (prior to assembly) is shown below.

If you are really into learning more about semiconductors from a materials perspective, visit the following web pages which offer a collection of really cool JAVA Applets to help understand all things electronic!

Is it not easy to see that the materials scientist and materials engineer must necessarily play a key role in the design, production and quality assurance of semiconductor devices, microelectronics packages and MEM systems?




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Please send any comments to Patrick P. Pizzo, Professor Emeritus, Materials Engineering
Created by Dr. Pizzo on August 1, 1997.
Last Revision, December 31, 2014